Field of the Invention
This invention relates to systems and methods for implementing FIFO buffers.
Background of the Invention
In conventional computer systems, a first-in-first-out (FIFO) buffer may be accessed by multiple threads. However, in conventional systems, only one thread at a time may access the FIFO buffer. This introduces delays and processing overhead in order to prevent simultaneous access by blocking threads while waiting for the data structures of the FIFO buffer to be released by another thread.
The systems and methods disclosed herein provide an improved approach for implementing a FIFO buffer that is simultaneously accessible by multiple threads.